Basic Hardware

• Main memory and the registers built into the processor itself are the only storage that the CPU can access directly. There are machine instructions that take memory addresses as arguments, but none that take disk addresses.
• Therefore, any instructions in execution, and any data being used by the instructions, must be in one of these direct-access storage devices.
• Registers that are built into the CPU are generally accessible within one cycle of the CPU clock. Most CPUs can decode instructions and perform simple operations on register contents at the rate of one or more operations per clock tick.
• The same cannot be said of main memory, which is accessed via a transaction on the memory bus. Memory access may take many cycles of the CPU clock to complete (processor stalls).
• The remedy is to add fast memory between the CPU and main memory (cache memory).
• Not only we are concerned with the relative speed of accessing physical memory, but we also must ensure correct operation has to protect the OS from access by user processes and, in addition, to protect user processes from one another.

  Figure 13: A base and a limit register define a logical address space.

  
• This protection must be provided by the hardware. We first need to make sure that each process has a separate memory space.
• We can provide this protection by using two registers, usually a base and a limit, as illustrated in Fig. 13.
  • The base register holds the smallest legal physical memory address;
  • The limit register specifies the size of the range.
  • For example, if the base register holds 300040 and limit register is 120900, then the program can legally access all addresses from 300040 through 420940 (inclusive).
• Protection of memory space is accomplished by having the CPU hardware compare every address generated in user mode with the registers.
• Any attempt by a program executing in user mode to access operating-system memory or other users' memory results in a trap to the OS, which treats the attempt as a fatal error (see Fig. 14).
• This scheme prevents a user program from (accidentally or deliberately) modifying the code or data structures of either the OS or other users.

  Figure 14: Hardware address protection with base and limit registers.